ad8926e492
Rumpk Stability, NipBox Boot, and Repository Cleanup
...
- Fixed Rumpk RISC-V Trap Handler (SSCRATCH swap, align(4), SUM bit) to prevent double faults.
- Stabilized Userland Transition (fence.i, MMU activation) allowing NipBox execution.
- Restored Forge pipeline to build NipBox from source.
- Documented critical RISC-V trap mechanics in internal docs.
- Committed pending repository cleanup (obsolete websites) and new core modules.
2026-01-04 21:39:06 +01:00
73620c43b1
Phase 37: The Glass Cage - Memory Isolation Complete
...
VICTORY: All page faults (Code 12, 13, 15) eliminated. NipBox runs in isolated userspace.
Root Cause Diagnosed:
- Kernel BSS (0x84D5B030) was overwritten by NipBox loading at 0x84000000
- current_fiber corruption caused cascading failures
Strategic Fixes:
1. Relocated NipBox to 0x86000000 (eliminating BSS collision)
2. Expanded DRAM to 256MB, User region to 64MB (accommodating NipBox BSS)
3. Restored Kernel GP register in trap handler (fixing global access)
4. Conditionally excluded ion/memory from userspace builds (removing 2MB pool)
5. Enabled release build optimizations (reducing BSS bloat)
Results:
- Kernel globals: SAFE
- User memory: ISOLATED (Sv39 active)
- Syscalls: OPERATIONAL
- Scheduler: STABLE
- NipBox: ALIVE (waiting for stdin)
Files Modified:
- core/rumpk/apps/linker_user.ld: User region 0x86000000-0x89FFFFFF (64MB)
- core/rumpk/hal/mm.zig: DRAM 256MB, User map 32-256MB
- core/rumpk/hal/entry_riscv.zig: GP reload in trap handler
- core/rumpk/core/ion.nim: Conditional memory export
- core/rumpk/libs/membrane/ion_client.nim: Local type declarations
- core/rumpk/libs/membrane/net_glue.nim: Removed ion import
- core/rumpk/libs/membrane/compositor.nim: Stubbed unused functions
- src/nexus/builder/nipbox.nim: Release build flags
Next: Fix stdin delivery to enable interactive shell.
2026-01-04 02:03:01 +01:00
738869c04b
feat(rumpk): Sovereign Ledger - VirtIO Block Driver & Persistence
...
- Implemented 'virtio-block' driver (hal/virtio_block.zig) for raw sector I/O.
- Updated 'virtio_pci.zig' with dynamic I/O port allocation to resolve PCI conflicts.
- Integrated Block I/O commands (0x600/0x601) into Kernel and ION.
- Added 'dd' command to NipBox for testing read/write operations.
- Fixed input buffering bug in NipBox to support longer commands.
- Added documentation for Phase 10.
2025-12-31 22:35:30 +01:00
46e7be6837
feat(rumpk): Phase 7 Verified - Subject Zero Launch
...
- Implemented Sovereign Syscall Table at 0x801FFF00
- Added cooperative yielding (s_yield) for Guest/Kernel concurrency
- Initialized Guest RX Ring and flows in Kernel
- Bridged LwIP in Guest via net_glue and ion_client overrides
- Validated TCP handshake and data transmission (Subject Zero -> Host)
- Confirmed 'Hello from the Membrane!' via UART and Network
2025-12-31 20:18:48 +01:00
3b755cac06
feat(rumpk): First successful Zig+Nim boot on QEMU ARM64
...
THE RUBICON IS CROSSED
======================
Rumpk v0.1 successfully boots on QEMU ARM64 virt machine.
Zig L0 initializes HAL and hands off to Nim L1.
BOOT OUTPUT
-----------
[Rumpk L0] Stack: 16KB @ stack_bytes
[Rumpk L0] UART: 0x09000000 (QEMU virt)
[Rumpk L0] Handing off to Nim L1...
[Rumpk L1] Memory: ARC (Deterministic)
[Rumpk L1] POSIX: None (Hostile)
[Rumpk L1] Status: OPERATIONAL
[Rumpk L1] The Rubicon is crossed.
[Rumpk L1] Zig + Nim = Sovereign Metal.
IMPLEMENTATION
--------------
Layer 0 (Zig):
- hal/main.zig: Naked _start, stack setup, zig_entry
- hal/uart.zig: PL011 UART driver for QEMU virt
Layer 1 (Nim):
- core/kernel.nim: kmain() entry, FFI imports from Zig
- Compiled with --mm:arc --os:any for freestanding
Glue (C Stubs):
- core/include/: string.h, stdio.h, stdlib.h, signal.h, etc.
- core/cstubs.c: memcpy, memset, strlen, printf, exit stubs
- Provides minimal libc for Nim's generated C code
Build System:
- build.sh: Orchestrates Zig build-obj + Nim c + zig cc link
- run.sh: QEMU launch script
- boot/linker.ld: ARM64 linker script at 0x40080000
VERIFICATION
------------
$ qemu-system-aarch64 -M virt -cpu cortex-a57 -nographic -kernel build/rumpk.elf
→ Successfully prints L0 and L1 banners
→ Enters idle loop (wfi instruction)
NEXT STEPS
----------
Phase 2: Simple bump allocator for Nim heap
Phase 3: Two-fiber context switch (Ping/Pong)
Phase 4: NPL loading with Ed25519 verification
Phase 5: VisionFive 2 RISC-V hardware boot
This proves: POSIX is optional. GCC is optional. Zig + Nim = Sovereign Metal.
2025-12-31 20:18:47 +01:00
Markus Maiwald