THE RUBICON IS CROSSED ====================== Rumpk v0.1 successfully boots on QEMU ARM64 virt machine. Zig L0 initializes HAL and hands off to Nim L1. BOOT OUTPUT ----------- [Rumpk L0] Stack: 16KB @ stack_bytes [Rumpk L0] UART: 0x09000000 (QEMU virt) [Rumpk L0] Handing off to Nim L1... [Rumpk L1] Memory: ARC (Deterministic) [Rumpk L1] POSIX: None (Hostile) [Rumpk L1] Status: OPERATIONAL [Rumpk L1] The Rubicon is crossed. [Rumpk L1] Zig + Nim = Sovereign Metal. IMPLEMENTATION -------------- Layer 0 (Zig): - hal/main.zig: Naked _start, stack setup, zig_entry - hal/uart.zig: PL011 UART driver for QEMU virt Layer 1 (Nim): - core/kernel.nim: kmain() entry, FFI imports from Zig - Compiled with --mm:arc --os:any for freestanding Glue (C Stubs): - core/include/: string.h, stdio.h, stdlib.h, signal.h, etc. - core/cstubs.c: memcpy, memset, strlen, printf, exit stubs - Provides minimal libc for Nim's generated C code Build System: - build.sh: Orchestrates Zig build-obj + Nim c + zig cc link - run.sh: QEMU launch script - boot/linker.ld: ARM64 linker script at 0x40080000 VERIFICATION ------------ $ qemu-system-aarch64 -M virt -cpu cortex-a57 -nographic -kernel build/rumpk.elf → Successfully prints L0 and L1 banners → Enters idle loop (wfi instruction) NEXT STEPS ---------- Phase 2: Simple bump allocator for Nim heap Phase 3: Two-fiber context switch (Ping/Pong) Phase 4: NPL loading with Ed25519 verification Phase 5: VisionFive 2 RISC-V hardware boot This proves: POSIX is optional. GCC is optional. Zig + Nim = Sovereign Metal. |
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| .zig-cache | ||
| boot | ||
| core | ||
| hal | ||
| io | ||
| README.md | ||
| build.sh | ||
| build.zig | ||
| run.sh | ||
README.md
Rumpk: The Modular Unikernel
"The Kernel is a Library. The App is the OS."
Status: EXPERIMENTAL
Languages: Zig (L0) + Nim (L1)
Design: POSIX-hostile, Military-grade
Directory Structure
rumpk/
├── boot/ [L0] Entry & Architecture (Zig/Asm)
│ ├── start.S Multiboot2/EFI entry point
│ └── arch/ Architecture-specific code
├── hal/ [L0] Hardware Abstraction (Zig)
│ ├── mm.zig Physical/Virtual Memory
│ ├── irq.zig Interrupt handling
│ ├── serial.zig UART/Early logging
│ └── abi.zig C-ABI export to Nim
├── core/ [L1] Logic (Nim)
│ ├── kernel.nim kmain() entry
│ ├── sched.nim LWKT Scheduler
│ ├── fiber.nim Fiber/Context management
│ └── ring.nim Disruptor buffer
├── sys/ [L2] ABI Glue
│ └── syscall.zig System call handlers
├── payload/ [L3] NPL/NPK Loaders
│ └── loader.nim Signature verification
└── io/ I/O Subsystem
└── governor.nim Adaptive War/Peace mode
Key Features
- Adaptive I/O: War Mode (polling) ↔ Peace Mode (interrupts)
- Disruptor Ring: Lock-free inter-fiber communication
- SipHash IDs: Collision-resistant process identification
- Ed25519: Only signed code executes
Specifications
Build (Coming Soon)
cd core/rumpk
zig build # Build L0 HAL
nimble build # Build L1 Logic