rumpk/hal
Markus Maiwald 82e1b7c657 Phase 31.2: The Identity Switch (Sv39 Virtual Memory)
THE CROSSING - COMPLETE
========================

Successfully transitioned from Physical to Virtual addressing using
Sv39 page tables. The kernel now operates in a fully virtualized
address space with identity mapping (VA=PA).

ARCHITECTURE
------------

1. Sv39 Page Table Infrastructure (hal/mm.zig):
   - 3-level page tables (512 entries per level)
   - 4KB pages with proper PTE bit packing
   - Bump allocator for page table allocation
   - map_page/map_range for flexible mapping

2. Kernel Identity Map:
   - DRAM: 0x80000000-0x88000000 (RWX)
   - UART: 0x10000000 (RW)
   - VirtIO MMIO: 0x10001000-0x10009000 (RW)
   - VirtIO PCI: 0x30000000-0x40000000 (RW)
   - VirtIO BARs: 0x40000000-0x50000000 (RW)
   - PLIC: 0x0c000000-0x0c400000 (RW)

3. Boot Sequence Integration:
   - mm_init(): Initialize page allocator
   - mm_enable_kernel_paging(): Build identity map, activate SATP
   - Transparent transition - no code changes required

THE MOMENT OF TRUTH
-------------------
[MM] Building Sv39 Page Tables...
[MM] Activating Identity Map...
[MM] ✓ Virtual Memory Active. Reality is Virtual.

System continued operation seamlessly:
✓ VirtIO Block initialized
✓ SFS filesystem mounted
✓ GPU probe completed
✓ All MMIO regions accessible

STRATEGIC ACHIEVEMENT
---------------------
This is the foundation for The Glass Cage (Phase 31.3).
We can now create restricted page tables for worker fibers,
enforcing true memory isolation without MMU context switches.

Files:
- core/rumpk/hal/mm.zig: Complete Sv39 implementation
- core/rumpk/core/kernel.nim: Boot integration
- src/nexus/builder/kernel.nim: Build system integration

Next: Phase 31.3 - Worker Isolation (Restricted Page Tables)

Build: Validated on RISC-V (rumpk-riscv64.elf)
Status: Production-ready - The Sovereign ascends to Virtual Reality
2026-01-02 15:24:32 +01:00
..
arch feat(rumpk): Phase 8 - The Summoning (ELF Loader) - 95% Complete 2025-12-31 20:18:49 +01:00
crypto feat(rumpk): Phase 7 Verified - Subject Zero Launch 2025-12-31 20:18:48 +01:00
README.md docs(rumpk): Add module READMEs per Panopticum doctrine 2025-12-31 20:18:47 +01:00
abi.zig feat(rumpk): Sovereign Core Stabilization & Membrane IPC Hardening 2025-12-31 20:18:49 +01:00
channel.zig 🎊 PHASE 8 COMPLETE: The Summoning - Dynamic ELF Loader OPERATIONAL 2025-12-31 21:08:25 +01:00
entry_riscv.zig Phase 27-29: Visual Cortex, Pledge, and The Hive 2026-01-02 14:12:00 +01:00
fb_wrapper.zig Phase 27-29: Visual Cortex, Pledge, and The Hive 2026-01-02 14:12:00 +01:00
framebuffer.zig Phase 27-29: Visual Cortex, Pledge, and The Hive 2026-01-02 14:12:00 +01:00
gpu.zig Phase 27-29: Visual Cortex, Pledge, and The Hive 2026-01-02 14:12:00 +01:00
hud.zig feat(rumpk): Phase 7 Verified - Subject Zero Launch 2025-12-31 20:18:48 +01:00
main.zig feat(rumpk): Sovereign Ledger - VirtIO Block Driver & Persistence 2025-12-31 22:35:30 +01:00
matrix.zig feat(rumpk): Sovereign Core Stabilization & Membrane IPC Hardening 2025-12-31 20:18:49 +01:00
mm.zig Phase 31.2: The Identity Switch (Sv39 Virtual Memory) 2026-01-02 15:24:32 +01:00
stubs.zig Phase 27-29: Visual Cortex, Pledge, and The Hive 2026-01-02 14:12:00 +01:00
uart.zig feat(rumpk): Sovereign Core Stabilization & Membrane IPC Hardening 2025-12-31 20:18:49 +01:00
ui.zig feat(rumpk): Sovereign Core Stabilization & Membrane IPC Hardening 2025-12-31 20:18:49 +01:00
virtio_block.zig Phase 27-29: Visual Cortex, Pledge, and The Hive 2026-01-02 14:12:00 +01:00
virtio_net.zig feat(rumpk): Sovereign Ledger - VirtIO Block Driver & Persistence 2025-12-31 22:35:30 +01:00
virtio_pci.zig Phase 27-29: Visual Cortex, Pledge, and The Hive 2026-01-02 14:12:00 +01:00

README.md

Rumpk HAL (L0)

Language: Zig + Assembly
Purpose: Hardware Abstraction Layer

Module Index

File Purpose
main.zig Entry point (_start), stack setup, calls Nim kmain
stubs.zig Freestanding libc (memcpy, malloc, printf, etc.)
uart.zig PL011 UART driver (QEMU virt)
abi.zig C ABI structs shared with Nim

Architecture Directory (arch/)

Contains per-architecture implementations:

arch/
├── aarch64/        # ARM64 (VisionFive 2, RPi, AWS Graviton)
│   ├── switch.S    # Context switch (96 bytes)
│   └── constants.nim
├── x86_64/         # System V ABI (servers, trading)
│   ├── switch.S    # Context switch (56 bytes)
│   └── constants.nim
└── riscv64/        # RISC-V LP64 (satellites, drones)
    ├── switch.S    # Context switch (112 bytes)
    └── constants.nim

Freestanding Doctrine

This HAL provides ALL C ABI symbols. No glibc, no musl.

Exported Symbols:

  • Memory: memcpy, memset, memmove, memcmp
  • Strings: strlen, strcmp, strcpy
  • Heap: malloc, free, realloc, calloc
  • I/O: printf, puts, putchar
  • Exit: exit, abort
  • Signals: signal, raise (no-op stubs)

Build

Compiled via zig build-obj -target <arch>-freestanding-none